Physical Design Intern – CPU/AI Hardware

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

As an intern on the Physical Design (PD) team, you will work on high-performance designs going into industry leading CPU and AI/ML architectures. The student coming into this role will be involved in all implementation aspects from synthesis to tapeout for various CPU and AI/ML IPs, tools, and flows to improve design PPA (Power, Performance, Area). The work is done collaboratively with a group of highly experienced engineers across various domains of chip design.

This role is on-site, 40 hours, based out of Santa Clara, CA, Austin, TX or Ft Collins, CO.

Responsibilities:

• Work closely with other PD engineers and the front end team to understand the chip architecture and drive physical design considerations early in the project cycle
• Physical design tasks such as synthesis, PnR, timing closure, area improvement, floor-planning, clocking, I/O planning and power optimization
• Learn and implement end-to-end flow development, synthesis to sign off
• Deploy innovative techniques for improving power, performance and area of the design, drive experiments with RTL, and evaluate synthesis, timing and power results
• Be involved in designing and applying techniques, tools, and flows to improve design PPA (Power, Performance, Area)

Experience & Qualifications:

• Currently pursuing a BS/MS/PhD in EE/ECE/CE/CS
• Some experience with synthesis, place and route flows and tools
• Basic familiarity with timing, EM/IR, and power analysis tools
• Knowledge of low-power design techniques such as multi-Vt and voltage scaling
• Strong programming skills in Tcl/Perl/Shell/Python
• Strong class work, projects, and/or internships in VLSI/Physical design
• Good understanding of logic design fundamentals and gate/transistor level implementation
• Strong problem solving skills